Simulating Hybrid Circuits of Single-Electron Transistors and Field-Effect Transistors

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 42, Issue 10, 2003, Pages 6467-6472

  Lientschnig, Günther ^a   Weymann, Irek ^a   Hadley, Peter ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

Background charge problem; Charge locked loop; Circuit simulation; Device modeling; Hybrid SET FET circuits; Orthodox theory; Ring oscillator; SET; Single electron tunneling; SPICE

Indexed keywords

CIRCUIT THEORY; ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; ELECTRON TUNNELING; ELECTRONS; MATHEMATICAL MODELS; OSCILLATORS (ELECTRONIC);

CHARGE-LOCKED LOOPS; SINGLE-ELECTRON TRANSISTORS;

FIELD EFFECT TRANSISTORS;

EID: 0348220484     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.42.6467     Document Type: Article

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