Controller estimation for FPGA target architectures during high-level synthesis

Proceedings of the International Symposium on System Synthesis

Volumn , Issue , 2002, Pages 56-61

  Menn, Carsten ^a   Bringmann, Oliver ^a   Rosenstiel, Wolfgang ^b  

^a FZI RESEARCH CENTER FOR INFORMATION TECHNOLOGY   (Germany)

^b UNIVERSITY OF TÜBINGEN   (Germany)

Author keywords

Area estimation; Controller; FPGA; High level synthesis

Indexed keywords

COMPUTER AIDED DESIGN; CONTROL THEORY; DESIGN FOR TESTABILITY; REQUIREMENTS ENGINEERING; STORAGE ALLOCATION (COMPUTER);

DESIGN SPACE EXPLORATION; HIGH LEVEL SYNTHESIS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036949720     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/581199.581213     Document Type: Conference Paper

References (6)

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