Minimizing the effect of process mismatch in a neuromorphic system using spike-timing-dependent adaptation

IEEE Transactions on Neural Networks

Volumn 19, Issue 5, 2008, Pages 899-913

  Cameron, Katherine ^a   Murray, Alan ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

Neuromorphic analog very large scale integration (VLSI); Spike timing dependent plasticity (STDP); Transistor mismatch

Indexed keywords

OPTIMIZATION; TRANSISTORS; VLSI CIRCUITS;

NEUROMORPHIC ANALOG VERY LARGE SCALE INTEGRATION; NEUROMORPHIC SYSTEM; PROCESS MISMATCH; SPIKE-TIMING-DEPENDENT PLASTICITY; TRANSISTOR MISMATCH;

ALGORITHMS;

ALGORITHM; ARTICLE; ARTIFICIAL NEURAL NETWORK; ELECTRONICS; NERVE CELL; NERVE CELL PLASTICITY; PHYSIOLOGY; SEMICONDUCTOR;

ALGORITHMS; ELECTRONICS; NEURAL NETWORKS (COMPUTER); NEURONAL PLASTICITY; NEURONS; TRANSISTORS;

EID: 44349136409     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNN.2007.914192     Document Type: Article

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