Low damage ashing and etching processes for ion implanted resist and Si3N4 removal by ICP and RIE methods

Microelectronic Engineering

Volumn 85, Issue 5-6, 2008, Pages 966-968

  Li, X ^a   Zhou, H ^a   Abrokwah, J ^b   Zurcher, P ^b   Rajagopalan, K ^b   Liu, W ^b   Gregory, R ^b   Passlack, M ^b   Thayne, I G ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

^b FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

Ash; Damage; Etch; Ga2O3; GaxGdyOz; GaAs; ICP; III V MOSFET; RIE; Si3N4

Indexed keywords

ATOMIC FORCE MICROSCOPY; CHEMICAL VAPOR DEPOSITION; INDUCTIVELY COUPLED PLASMA; MOSFET DEVICES; PHOTORESISTS; REACTIVE ION ETCHING; SILICON COMPOUNDS; SURFACE ROUGHNESS;

DEVICE LAYER STRUCTURES; ELECTRICAL TRANSPORT PROPERTIES; ROOM TEMPERATURE;

ION IMPLANTATION;

EID: 44149115766     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2007.12.056     Document Type: Article

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