A network of time-division multiplexed wiring for FPGAs

Proceedings - Second IEEE International Symposium on Networks-on-Chip, NOCS 2008

Volumn , Issue , 2008, Pages 35-44

  Francis, Rosemary ^a   Moore, Simon ^a   Mullins, Robert ^a  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

TIME-MULTIPLEXED WIRING; WIRE SHARING ARCHITECTURE;

ALGORITHMS; CHANNEL CAPACITY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERCONNECTION NETWORKS;

TIME DIVISION MULTIPLEXING;

EID: 44149086928     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NOCS.2008.4492723     Document Type: Conference Paper

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