VLSI architecture of the reconfigurable computing engine for digital signal processing applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Chen, Lien Fei ^a   Lai, Yeong Kang ^a  

^a NATIONAL CHUNG HSING UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDWIDTH; COMPUTATIONAL COMPLEXITY; DATA PROCESSING; ELECTRIC NETWORK TOPOLOGY; PROGRAM PROCESSORS;

DISCRETE COSINE TRANSFORM (DCT); GENERAL-PURPOSE PROCESSING-CLUSTER (GPPC); NETWORK DELAY; RECONFIGURABLE COMPUTING (RC);

DIGITAL SIGNAL PROCESSING;

EID: 4344596289     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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