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Volumn 1998-April, Issue , 1998, Pages 1-10

A quantitative analysis of reconfigurable coprocessors for multimedia applications

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; COMPUTATION THEORY; COMPUTERS; COPROCESSOR; MULTIMEDIA SYSTEMS; RECONFIGURABLE ARCHITECTURES;

EID: 84942851882     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.1998.707876     Document Type: Conference Paper
Times cited : (112)

References (24)
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  • 3
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    • Ruby B. Lee, "Subword Parallelism with MAX-2", IEEE Micro, pp. 51-59, Aug. 1996.
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    • Nov
    • Kunle A. Olukotun, Rachid Helaihel, Jeremy Levitt, and Ricardo Ramirez, "A Software-Hardware Cosynthesis Approach to Digital System Simulation", IEEE Micro, Vol. 14, pp. 48-58, Nov. 1994.
    • (1994) IEEE Micro , vol.14 , pp. 48-58
    • Olukotun, K.A.1    Helaihel, R.2    Levitt, J.3    Ramirez, R.4
  • 5
    • 0027561268 scopus 로고
    • Processor Reconfiguration through Instruction-set Metamorphosis
    • Mar
    • Peter M. Athanas and Harvery F. Silverman, "Processor Reconfiguration through Instruction-set Metamorphosis", IEEE Computer, vol. 26, no. 3, pp. 11-18, Mar. 1994.
    • (1994) IEEE Computer , vol.26 , Issue.3 , pp. 11-18
    • Athanas, P.M.1    Silverman, H.F.2
  • 12
    • 0030394522 scopus 로고    scopus 로고
    • MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources
    • Ethan Mirsky and André DeHon, "MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources", IEEE Symposium on FPGAs for Custom Computing Machines, 1996.
    • (1996) IEEE Symposium on FPGAs for Custom Computing Machines
    • Mirsky, E.1    Dehon, A.2
  • 13
    • 3042645445 scopus 로고    scopus 로고
    • RE-MARC: Reconfigurable Multimedia Array Coprocessor
    • (as poster paper)
    • Takashi Miyamori and Kunle Olukotun, "RE- MARC: Reconfigurable Multimedia Array Coprocessor", FPGA'98 (as poster paper), 1998.
    • (1998) FPGA'98
    • Miyamori, T.1    Olukotun, K.2
  • 14
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    • Prentice Hall, Englewood Cliffs
    • Gerry Kane, "MIPS RISC Architecture", Prentice Hall, Englewood Cliffs, 1988.
    • (1988) MIPS RISC Architecture
    • Kane, G.1
  • 16
    • 85049198755 scopus 로고    scopus 로고
    • XC4000XL-1 FPGAs Exceed 100MHz
    • Xilinx, "XC4000XL-1 FPGAs Exceed 100MHz", XCELL Articles, Q3, 1997.
    • (1997) XCELL Articles , pp. Q3
    • Xilinx1
  • 24
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    • The MIPS R10000 Superscalar Microprocessor
    • April
    • Kenneth C. Yeager, "The MIPS R10000 Superscalar Microprocessor", IEEE Micro, pp. 28-40, April 1996.
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    • Yeager, K.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.