-
1
-
-
0041606016
-
VIS Speeds New Media Processing
-
Aug
-
Marc Tremblay, J. Michael O'Connor, Venkatesh Narayanan, and Liang He, "VIS Speeds New Media Processing", IEEE Micro, pp. 10-20, Aug. 1996.
-
(1996)
IEEE Micro
, pp. 10-20
-
-
Marc Tremblay, J.1
O'Connor, M.2
Narayanan, V.3
He, L.4
-
2
-
-
0002517538
-
MMX Technology Extension to the Intel Architecture
-
Aug
-
Alex Peleg and Uri Weiser, "MMX Technology Extension to the Intel Architecture", IEEE Micro, pp. 42-50, Aug. 1996.
-
(1996)
IEEE Micro
, pp. 42-50
-
-
Peleg, A.1
Weiser, U.2
-
3
-
-
0002449750
-
Subword Parallelism with MAX-2
-
Aug
-
Ruby B. Lee, "Subword Parallelism with MAX-2", IEEE Micro, pp. 51-59, Aug. 1996.
-
(1996)
IEEE Micro
, pp. 51-59
-
-
Lee, R.B.1
-
4
-
-
0028484187
-
A Software-Hardware Cosyn-thesis Approach to Digital System Simulation
-
Nov
-
Kunle A. Olukotun, Rachid Helaihel, Jeremy Levitt, and Ricardo Ramirez, "A Software-Hardware Cosynthesis Approach to Digital System Simulation", IEEE Micro, Vol. 14, pp. 48-58, Nov. 1994.
-
(1994)
IEEE Micro
, vol.14
, pp. 48-58
-
-
Olukotun, K.A.1
Helaihel, R.2
Levitt, J.3
Ramirez, R.4
-
5
-
-
0027561268
-
Processor Reconfiguration through Instruction-set Metamorphosis
-
Mar
-
Peter M. Athanas and Harvery F. Silverman, "Processor Reconfiguration through Instruction-set Metamorphosis", IEEE Computer, vol. 26, no. 3, pp. 11-18, Mar. 1994.
-
(1994)
IEEE Computer
, vol.26
, Issue.3
, pp. 11-18
-
-
Athanas, P.M.1
Silverman, H.F.2
-
9
-
-
0031376640
-
The Chimaera Reconfigurable Functional Unit
-
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, and Jeffrey P. Kao, "The Chimaera Reconfigurable Functional Unit", IEEE Symposium on FPGAs for Custom Computing Machines, 1997.
-
(1997)
IEEE Symposium on FPGAs for Custom Computing Machines
-
-
Hauck, S.1
Fry, T.W.2
Hosler, M.M.3
Kao, J.P.4
-
12
-
-
0030394522
-
MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources
-
Ethan Mirsky and André DeHon, "MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources", IEEE Symposium on FPGAs for Custom Computing Machines, 1996.
-
(1996)
IEEE Symposium on FPGAs for Custom Computing Machines
-
-
Mirsky, E.1
Dehon, A.2
-
13
-
-
3042645445
-
RE-MARC: Reconfigurable Multimedia Array Coprocessor
-
(as poster paper)
-
Takashi Miyamori and Kunle Olukotun, "RE- MARC: Reconfigurable Multimedia Array Coprocessor", FPGA'98 (as poster paper), 1998.
-
(1998)
FPGA'98
-
-
Miyamori, T.1
Olukotun, K.2
-
14
-
-
0004088729
-
-
Prentice Hall, Englewood Cliffs
-
Gerry Kane, "MIPS RISC Architecture", Prentice Hall, Englewood Cliffs, 1988.
-
(1988)
MIPS RISC Architecture
-
-
Kane, G.1
-
15
-
-
3843096539
-
The SimOS Approach
-
M. Rosenblum, S. Herrod, E. Withchel, and A. Gupta, "The SimOS Approach", IEEE Parallel and Distributed Technology, Vol. 4, No. 3, 1995.
-
(1995)
IEEE Parallel and Distributed Technology
, vol.4
, Issue.3
-
-
Rosenblum, M.1
Herrod, S.2
Withchel, E.3
Gupta, A.4
-
16
-
-
85049198755
-
XC4000XL-1 FPGAs Exceed 100MHz
-
Xilinx, "XC4000XL-1 FPGAs Exceed 100MHz", XCELL Articles, Q3, 1997.
-
(1997)
XCELL Articles
, pp. Q3
-
-
Xilinx1
-
17
-
-
0003855464
-
-
2nd edition, John Wiley and Sons
-
Bruce Schneier, "Applied Cryptography: Protocols, Algorithms, and Source Code in C", 2nd edition, John Wiley and Sons, 1996.
-
(1996)
Applied Cryptography: Protocols, Algorithms, and Source Code in C
-
-
Schneier, B.1
-
24
-
-
0030129806
-
The MIPS R10000 Superscalar Microprocessor
-
April
-
Kenneth C. Yeager, "The MIPS R10000 Superscalar Microprocessor", IEEE Micro, pp. 28-40, April 1996.
-
(1996)
IEEE Micro
, pp. 28-40
-
-
Yeager, K.C.1
|