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Volumn 1, Issue , 2006, Pages 395-398

Towards accurate and efficient reliability modeling of nanoelectronic circuits

Author keywords

Fault tolerance; Nanoelectronics; Reliability

Indexed keywords

FAULT TOLERANCE; NETWORKS (CIRCUITS); PROBABILISTIC LOGICS; RELIABILITY ANALYSIS;

EID: 42549140212     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/nano.2006.247660     Document Type: Conference Paper
Times cited : (37)

References (8)
  • 1
    • 42549147305 scopus 로고    scopus 로고
    • A probabilistic-based design for nanoscale computation
    • Shukla and Bahar, eds
    • R.I. Bahar, J. Chen and J. Mundy, "A probabilistic-based design for nanoscale computation," in Shukla and Bahar, eds. Nano, Quantum and Molecular Computing, 2004, pp. 133-156.
    • (2004) Nano, Quantum and Molecular Computing , pp. 133-156
    • Bahar, R.I.1    Chen, J.2    Mundy, J.3
  • 5
    • 42549167336 scopus 로고    scopus 로고
    • Faults, Error Bounds and Reliability of Nanoelectronic Circuits
    • J. Han, E. Taylor, J. Gao and J. Fortes, "Faults, Error Bounds and Reliability of Nanoelectronic Circuits," Proc. IEEE ASAP, 2005.
    • (2005) Proc. IEEE ASAP
    • Han, J.1    Taylor, E.2    Gao, J.3    Fortes, J.4
  • 8
    • 0142184763 scopus 로고    scopus 로고
    • Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits
    • K. Mohanram and N. A. Touba. "Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits." Proc. Intl. Test Conference, 2003.
    • (2003) Proc. Intl. Test Conference
    • Mohanram, K.1    Touba, N.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.