Effect of channel width, length, and latent damage on NBTI

2004 International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2004, Pages 303-306

  Cellere, G ^a   Valentini, M G ^b   Paccagnella, A ^a  

^a UNIVERSITY OF PADOVA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TRAPS; ELECTRONS; ETCHING; GATES (TRANSISTOR); POLYSILICON; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

GATE BIASES; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); PLASMA INDUCED DAMAGE; VOLTAGE SHIFT;

MOSFET DEVICES;

EID: 4143060374     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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