Physical understanding and modeling of SANOS retention in programmed state

Solid-State Electronics

Volumn 52, Issue 4, 2008, Pages 577-583

  Furnémont, Arnaud ^a,b   Cacciato, Antonio ^a   Breuil, Laurent ^a   Rosmeulen, Maarten ^a   Maes, Herman ^a,b   De Meyer, Kristin ^a,b   Van Houdt, Jan ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Detrapping; Redistribution; Retention; SANOS; Tunnelingr

Indexed keywords

ALUMINUM COMPOUNDS; ELECTRON TUNNELING; GATE DIELECTRICS; SILICON NITRIDE; TEMPERATURE DISTRIBUTION;

ALUMINUM OXIDES; ELECTRON DETRAPPING; SCALED TRANSISTORS;

CAPACITORS;

EID: 40849120286     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2008.01.004     Document Type: Article

References (8)

1. Schuetz R, Oh H, Kim JK, Pyeon HB, Przybylski S, Gillingham P. Hyperlink NAND flash architecture for mass storage applications. In: Proceedings of the non volatile semiconductor memory workshop; 2007. p. 3-4.
2. Prall K. Scaling non-volatile memory below 30 nm. In: Proceedings of the non volatile semiconductor memory workshop; 2007. p. 5-10.
3. 2 cell size using TANOS cell technology. IEDM Tech Dig (2006) 29-32
4. Kim K., and Choi J. Future outlook of NAND Flash technology for 40 nm node and beyond. NVSMW Proc (2006) 9-11
5. White M., Adams D., and Bu J. On the go with SONOS. IEEE Circ Dev 16 (2000) 22-31
6. 3 morphology on the erase saturation performance in SANOS-type cells. Proc ICMTD (2007) 217-220
7. Kang C, Choi J, Sim J, Lee C, Shin Y, Park J et al. Effects of lateral charge spreading on the reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND flash memory. In: International reliability physics symposium proceedings; 2007. p. 167-170.
8. Furnémont A, Rosmeulen M, van der Zanden K, Van Houdt J, De Meyer K, Maes H. Physical modeling of retention in localized trapping nitride memory devices. In: IEDM - technical digest of the international electron device meeting; 2006. p. 397-400.