CON-TACT® planarization process of spin-on dielectrics for device fabrication

ECS Transactions

Volumn 6, Issue 3, 2007, Pages 501-522

  Shib, Wu Sheng ^a   Yota, Jiro ^b   Itchhaporia, Ketan ^a  

^a BREWER SCIENCE INC   (United States)

^b SKYWORKS SOLUTIONS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANTIREFLECTION COATINGS; FABRICATION; INSULATING MATERIALS; LOW-K DIELECTRIC; NITRIDES; PHOTORESISTS; PLASTIC FILMS; REFLECTIVE COATINGS; SILICA; SILICON NITRIDE; SPIN GLASS; TOPOGRAPHY;

ANTI REFLECTIVE COATINGS; DEVICE FABRICATIONS; DEVICE PERFORMANCE; GLOBAL PLANARITIES; PLANARIZATION PROCESS; PLANARIZATION TECHNOLOGY; SPIN ON DIELECTRICS; SPIN-ON DIELECTRIC MATERIALS;

DIELECTRIC MATERIALS;

EID: 40549112234     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.2728816     Document Type: Conference Paper

References (42)

1. Y. Nishi and R. Doering, editors, Handbook of Semiconductor Manufacturing Technology, Marcel Dekker, Inc., New York, NY (2000).
2. G.B. Shinn, G. Grover, S. Fang, V. Korthuis, and A.M. Wilson m Handbook of Semiconductor Manufacturing Technology, Y. Nishi and R. Doering, Editors, p. 417, Marcel Dekker, Inc., New York, NY (2000).
3. S. Wolf, Silicon Processing for the VLSI Era: Volume 4 - Deep-Submicron Process Technology, pp. 315-318, Lattice Press, Sunset Beach, CA (2002).
4. J.M. Steigerwald, S.P. Murarka, and R.J. Gutmann, Chemical Mechanical Planarization of Microelectronic Materials, p. 28, Wiley-Interscience, New York, NY (1997).
5. M. Bacchetta, L. Bacci, N. Iazzi, I. Liles, and L. Zanotti, Proceedings of SPIE, 2090, pp.72-84 (1993).
6. M. Bacchetta and C. Zaccherim, Proceedings of SPIE, 2335, pp. 21-29 (1994).
7. J.M. Steigerwald, S.P. Murarka, and R.J. Gutmann, Chemical Mechanical Planarization of Microelectronic Materials, Wiley-Interscience, New York, NY, (1997).
8. G.B. Shinn, G. Grover, S. Fang, V. Korthuis, and A.M. Wilson in Handbook of Semiconductor Manufacturing Technology, Y. Nishi and R. Doering, Editors, p. 415, Marcel Dekker, Inc., New York, NY (2000).
9. G.B. Shinn, G. Grover, S. Fang, V. Korthuis, and A.M. Wilson in Handbook of Semiconductor Manufacturing Technology, Y. Nishi and R. Doering, Editors, p. 415, Marcel Dekker, Inc., New York, NY (2000).
10. K. Machida, H. Kyuragi, H. Akiya, K. Imai, A. Tounai and A. Nakashima, J. Vac. Sci. Technol. B, 16(3), 1093 (1998).
11. N. Sato, K. Machida, K. Kudo, M. Yano, and H. Kyuragi, m Advanced Metallization Conference, D. Edelstein, G. Dixit, Y. Yasuda, and T. Ohba, Editors, Materials Research Society Proceedings, Warrendale, PA (2000).
12. N. Sato, K. Machida, M. Yano, K. Kudo, and H. Kyuragi, Jpn. J. Appl. Phys. 41, 2367 (2002).
13. S. Shishiguchi, T. Fukuda, H. Kochiya, and H. Yanazawa, in Interconnect Technology Conference (IITC) 2002, Proceedings of the IEEE 2002 International Conference, 36 (2002).
14. K. Machida, Semiconductor Manufacturing, 32, April (2005).
15. J.A. Prybyla and G.N. Taylor, in 1994 Symposium on VLSI Technology Digest of Technical Papers, 75-76 (1994).
16. J.A. Prybyla, U.S. Patent No. 5,736.424, April 7, 1998.
17. J.A. Prybyla, U.S. Patent No. 6,048,799, April 11, 2000.
18. J.E. Lamb III, in SEMI® Technology Symposium (STS): Innovations in Semiconductor Manufacturing (ISM), pp. 171-183, SEMICON® West, San Francisco, CA (2002).
19. th International Symposium on Microelectronics, pp. 813-818, IMAPS 2003 proceedings, Boston, MA (2003).
20. W.-S. Shih, C.J. Neef, M.G. Daffron, Proceedings of SPIE, 5376, pp. 664-672 (2004).
21. M. Daffron, W.-S. Shih, and R. Rich, in Proceedings of the Ninth International Chemical-Mechanical Planarization for ULSI Multilevel Interconnection Conference (CMP-MIC), pp. 377-384 (2004).
22. M. Daffron, W.-S. Shih, R. Rich, J. Dachsteiner, J. Snook, SEMICON® West CMP Symposium, San Francisco, CA, July 2004.
23. M. Daffron, W.-S. Shih, and K. Marler, in Proceedings of the Fourth International Conference on Semiconductor Technology (ISTC 2005), M. Yang, Editor, PV2005-12, pp.620-629, The Electrochemical Society Proceedings Series, Pennington, NJ (2005).
24. X.-L. Xing, J.-W. Jiao, M. Daffron, Y.-L. Wang, and H. Choi, Journal of Functional Materials and Devices, 12(2), 135-138 (2006).
25. J.M. Steigerwald, S.P. Murarka, and R.J. Gutmann, Chemical Mechanical Planarization of Microelectronic Materials, pp. 22-25, Wiley-Interscience, New York, NY (1997).
26. J.A. Mucha, D.W. Hess, and E.S. Aydil, in Introduction to Microlithography, second edition, L.F. Thompson, C.G. Willson, and M.J. Bowden, Editors, pp. 412-422, ACS Professional Reference Book, American Chemical Society, Washington, DC (1994).
27. G.B. Shinn, G. Grover, S. Fang, V. Korthuis, and A.M. Wilson in Handbook of Semiconductor Manufacturing Technology, Y. Nishi and R. Doering, Editors, pp. 440-442, Marcel Dekker, Inc., New York, NY (2000).
28. G.B. Shinn, G. Grover, S. Fang, V. Korthuis, and A.M. Wilson in Handbook of Semiconductor Manufacturing Technology, Y. Nishi and R. Doering, Editors, pp. 442-444, Marcel Dekker, Inc., New York, NY (2000).
29. J.M. Steigerwald, S.P. Murarka, and R.J. Gutmann, Chemical Mechanical Planarization of Microelectronic Materials, p. 254-267, Wiley-Interscience, New York, NY (1997).
30. C.L. Borst, D.G. Thakurta, W.N. Gill, and R.J. Gurmann, J. Electrochem. Soc., 146(11), 4309-4315 (1999).
31. 31.L.F. Thompson, in Introduction to Microlithography, second edition, L.F. Thompson, C.G. Willson, and M.J. Bowden, Editors, pp. 361-363, ACS Professional Reference Book, American Chemical Society, Washington, DC (1994).
32. S. Wolf, Silicon Processing for the VLSI Era: Volume 4 - Deep-Submicron Process Technology, pp. 326-330, Lattice Press, Sunset Beach, CA (2002).
33. SKW Associates Inc., (www.tcstwafer.com).
34. S. Wolf, in Silicon Processing for the VLSI Era: Volume 4 - Deep-Submicron Process Technology, pp. 671-701, Lattice Press, Sunset Beach, CA (2002).
35. A. Chen, H.L. Huang, V. Chang, and A. Chang, U.S. Patent No. 6,680,252, January 20, 2004.
36. J. D. Meador, D. Holmes, W.L. DiMenna, M. Nagatkina, M. Rich, T.D. Flaim, R. Bennett, I. Kobayashi, Proceedings of SPIE, 5039, pp. 948-959 (2003).
37. J.D. Meador, D. Holmes, M. Nagatkma, R. Puhgadda, D. Gum, R. Bennett, S. Sun, T. Enomoto, Proceedings of SPIE, 5376, pp. 1138-1148 (2004).
38. M. Slezak, Solid State Technology, 36-38, July (2003).
39. G. Barclay, S. Kanagasabapathy, G. Pohlers, F. Huby, and K. Wiely, Solid State Technology, 73-78, July (2003).
40. P. Cirigliano, R. Sadjadi, A. Athayde, G. Barclay, J. Wandell, and F. Fischer, Semiconductor Fabtech, 20(4), 56-59 (2003).
41. L.F. Thompson, in Introduction to Microlithography, second edition, L.F. Thompson, C.G. Willson, and M.J. Bowden, Editors, pp. 347-348, ACS Professional Reference Book, American Chemical Society, Washington, DC (1994).
42. L.F. Thompson, in Introduction to Microlithography, second edition, L.F. Thompson, C.G. Willson, and M.J. Bowden, Editors, pp. 356-361, ACS Professional Reference Book American Chemical Society, Washington, DC (1994).