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Volumn 48, Issue 3-4, 2004, Pages 461-474

Functional verification of a frequency-programmable switch chip with asynchronous clock sections

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDWIDTH; C (PROGRAMMING LANGUAGE); COMPUTER SIMULATION; COMPUTER SYSTEM RECOVERY; ERROR DETECTION; INTERFACES (COMPUTER); LOGIC DESIGN; OBJECT ORIENTED PROGRAMMING; SERVERS;

EID: 4043110803     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.483.0461     Document Type: Article
Times cited : (1)

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    • July/September
    • J. M. Hoke, P. W. Bond, R. R. Livolsi, T. C. Lo, F. S. Pidala, and G. Steinbrueck, "Self-Timed Interface of the Input/Output Subsystem of the IBM eServer z900," IBM J. Res. & Dev. 46, No. 4/5, 447-460 (July/September 2002).
    • (2002) IBM J. Res. and Dev. , vol.46 , Issue.4-5 , pp. 447-460
    • Hoke, J.M.1    Bond, P.W.2    Livolsi, R.R.3    Lo, T.C.4    Pidala, F.S.5    Steinbrueck, G.6
  • 8
    • 0025404497 scopus 로고
    • Built-in self-test support in the IBM engineering design system
    • March/May
    • B. L. Keller and T. J. Snethen, "Built-In Self-Test Support in the IBM Engineering Design System," IBM J. Res. & Dev. 34, No. 2/3, 406-415 (March/May 1990).
    • (1990) IBM J. Res. and Dev. , vol.34 , Issue.2-3 , pp. 406-415
    • Keller, B.L.1    Snethen, T.J.2
  • 9
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    • Test methodologies and design automation for IBM ASICs
    • July
    • P. S. Gillis, T. S. Guzowski, B. L. Keller, and R. H. Kerr, "Test Methodologies and Design Automation for IBM ASICs," IBM J. Res. & Dev. 40, No. 4, 461-474 (July 1996).
    • (1996) IBM J. Res. and Dev. , vol.40 , Issue.4 , pp. 461-474
    • Gillis, P.S.1    Guzowski, T.S.2    Keller, B.L.3    Kerr, R.H.4
  • 11
    • 0033325635 scopus 로고    scopus 로고
    • PLL modeling and verification in a cycle-simulation environment
    • September/November
    • G. A. Van Huben, T. G. McNamara, and T. E. Gilbert, "PLL Modeling and Verification in a Cycle-Simulation Environment," IBM J. Res. & Dev. 43, No. 5/6, 915-925 (September/November 1999).
    • (1999) IBM J. Res. and Dev. , vol.43 , Issue.5-6 , pp. 915-925
    • Van Huben, G.A.1    McNamara, T.G.2    Gilbert, T.E.3
  • 12
    • 0031176641 scopus 로고    scopus 로고
    • SimAPI - A common programming interface for simulation
    • July/September
    • G. G. Hallock, E. J. Kaminski, Jr., K. M. Lasko, and M. P. Mullen, "SimAPI - A Common Programming Interface for Simulation," IBM J. Res. & Dev. 41, No. 4/5, 601-610 (July/September 1997).
    • (1997) IBM J. Res. and Dev. , vol.41 , Issue.4-5 , pp. 601-610
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  • 13
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    • Verity - A formal verification program for custom CMOS circuits
    • January/March
    • A. Kuehlmann, A. Srinivasan, and D. P. LaPotin, "Verity - A Formal Verification Program for Custom CMOS Circuits," IBM J. Res. & Dev. 39, 149-165 (January/March 1995).
    • (1995) IBM J. Res. and Dev. , vol.39 , pp. 149-165
    • Kuehlmann, A.1    Srinivasan, A.2    LaPotin, D.P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.