Test methodologies and design automation for IBM ASICs

IBM Journal of Research and Development

Volumn 40, Issue 4, 1996, Pages 461-473

  Gillis, P S ^{a,b,c,d,e,f,g,h,i}   Guzowski, T S ^a,e,f,j,k   Keller, B L ^a,l,m,n   Kerr, R H ^a,e,o  

^a IBM MICROELECTRONICS   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c UNIVERSITY OF COLORADO   (United States)

^d NORTHROP GRUMMAN CORPORATION   (United States)

^e IBM   (United States)

^f ASIC Test Methodology Team ^*

^g ASIC Products Organization

^h Inst Elec Electronics Engineers

ⁱ Society of Woman Engineers

^j INDIANA UNIVERSITY OF PENNSYLVANIA   (United States)

^k ASIC Design Center

^l PENNSYLVANIA STATE UNIVERSITY   (United States)

^m TestBench ATPG Des Automat System

ⁿ IEEE

^o Potsdam State University

more..

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING;

DESIGN AUTOMATION; DESIGN FOR TESTING;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0030196870     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.404.0461     Document Type: Article

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