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Volumn 43, Issue 5, 1999, Pages 915-925

PLL modeling and verification in a cycle-simulation environment

Author keywords

[No Author keywords available]

Indexed keywords

CLIENT SERVER COMPUTER SYSTEMS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER TESTING; COMPUTER WORKSTATIONS; INTERFACES (COMPUTER); PERSONAL COMPUTERS; PHASE LOCKED LOOPS;

EID: 0033325635     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.435.0915     Document Type: Article
Times cited : (2)

References (2)
  • 1
    • 0031176431 scopus 로고    scopus 로고
    • The role of two-cycle simulation in the S/390 verification process
    • Gary A. Van Huben, "The Role of Two-Cycle Simulation in the S/390 Verification Process," IBM J. Res. Develop. 41, 593-599 (1997).
    • (1997) IBM J. Res. Develop. , vol.41 , pp. 593-599
    • Van Huben, G.A.1
  • 2
    • 85037958353 scopus 로고    scopus 로고
    • Mixed signal Ics need top down design
    • May 13
    • K. Ogawa, Yuji Gendai, and Eric Filseth, "Mixed Signal Ics Need Top Down Design," EE Times, May 13, 1996.
    • (1996) EE Times
    • Ogawa, K.1    Gendai, Y.2    Filseth, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.