A 128Mb floating body RAM(FBRAM) on SOI with multi-averaging scheme of dummy cell

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2006, Pages 180-181

  Ohsawa, Takashi ^a   Higashi, Tomoki ^a   Fujita, Katsuyuki ^a   Hatsuda, Kosuke ^a   Ikumi, Nobuyuki ^a   Shino, Tomoaki ^a   Nakajima, Hiroomi ^a   Minami, Yoshihiro ^a   Kusunoki, Naoki ^a   Sakamoto, Atsushi ^a   Nishimura, Jun ^a   Hamamoto, Takeshi ^a   Fujii, Shuso ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FABRICATION; VLSI CIRCUITS;

DUMMY CELL; FLOATING BODY CELL(FBC);

RANDOM ACCESS STORAGE;

EID: 39749187332     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. S. Okhonin et al., "ASOI capacitor-less IT-DRAM concept, "IEEE Int. SOI Conf., pp. 153-154, 2001.
2. T. Ohsawa et al., "Memory design using one-transistor gain cell on SOI, "ISSCC Dig. Tech. Papers, pp. 152-153, 2002.
3. R. Ranica et al., "A one transistor cell on bulk substrate(IT-Bulk) for low-cost and high density eDRAM,"2004 Symposium on VLSI Tech. Digest of Papers, pp. 128-129, 2004.
4. T. Ohsawa et al., "An 18.5ns 128Mb SOI DRAM with a floating body cell/"ISSCC Dig. Tech. Papers, pp.458-459, 2005.
5. Y. Minami et al., "A floating body cell(FBC) fully compatible with 90nm CMOS techjiology(CMOSIV) for 128Mb SOI DRAM,"IEDM Tech. Dig., pp.317-320, 2005.
6. S. Okhonin et al., "Principles of transient charge pumping on partially depleted SOI MOSFETs,"IEEE Electron Device Letters, vol.23, no.5, pp.279-281, 2002.