A one transistor cell on bulk substrate (1T-bulk) for low-cost and high density eDRAM

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2004, Pages 128-129

  Ranica, R ^a   Villaret, A ^a   Malinge, P ^a   Mazoyer, P ^a   Lenoble, D ^a   Candelier, P ^a   Jacquet, F ^a   Masson, P ^b   Bouchakour, R ^b   Fournel, R ^a   Schoellkopf, J P ^a   Skotnicki, T ^a  

^a STMICROELECTRONICS   (France)

^b AIX MARSEILLE UNIVERSITÉ   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DATA ACQUISITION; ELECTRIC POWER UTILIZATION; IMPACT IONIZATION; MOSFET DEVICES; PERTURBATION TECHNIQUES; SILICON;

BODY-SOURCE JUNCTIONS; BULK SILICON SUBSTRATES; SOURCE LINE (SL); WORD LINE (WL);

DYNAMIC RANDOM ACCESS STORAGE;

EID: 4544324633     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsit.2004.1345433     Document Type: Conference Paper

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