Through silicon via and 3-D wafer/chip stacking technology

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2006, Pages 89-92

  Takahashi, Kenji ^a   Sekiguchi, Masahiro ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Printed circuit board; Three dimensional integration; Through silicon via

Indexed keywords

COSTS; FABRICATION; MICROPROCESSOR CHIPS; SILICON;

CHIP STACKING; HIGH SPEED MICROPROCESSORS;

VLSI CIRCUITS;

EID: 39749177820     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

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