An 8.6mW 12.5Mvertices/s 800MOPS 8.91mm2 stream processor core for mobile graphics and video applications

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2007, Pages 218-219

  Tsao, You Ming ^a   Chang, Chin Hsiang ^a   Lin, Yu Cheng ^a   Chien, Shao Yi ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Adaptive multi thread; Configurable memory array and early rejection after transformation; Low power GPU; Stream processor; Vertex shader

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; GRAPHIC METHODS; MOTION ESTIMATION;

MEMORY ARRAY; STREAM PROCESSOR CORE; VERTEX SHADERS;

VIDEO STREAMING;

EID: 39749129182     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2007.4342725     Document Type: Conference Paper

References (6)

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