A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Yu, Chang Hyo ^a   Chung, Kyusik ^a   Kim, Donghyun ^a   Kim, Lee Sup ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; MICROPROCESSOR CHIPS; MULTIMEDIA SYSTEMS;

DATAPATH; MOBILE MULTIMEDIA APPLICATIONS;

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 39749098857     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. F. Arakawa, et. al., "An Embedded Processor Core for Consumer Applications with 2.8GFLOPS and 36M Polygons/s FPU," ISSCC Dig. Tech. Papers, pp. 334-335, Feb. 2004.
2. J. Sohn, et. al., "A 50Mvertices/s Graphics Processor with Fixed-Point Programmable Vertex Shader for Mobile Applications," ISSCC Dig. Tech. Papers, pp. 192-193, Feb. 2005.
3. D. Kim, et. al., "An SoC with 1.3Gtexels/s 3D Graphics Full Pipeline Engine for Consumer Applications," ISSCC Dig. Tech. Papers, pp. 190-191, Feb. 2005.
4. OpenGL ES 2.0, http://khronos.org.
5. Shader model 3.0, http://microsoft.com.
6. FX Composer 1.8, http://nvidia.com.