A 94dB SFDR 78dB DR 2.2MHz BW multi-bit delta-sigma modulator with noise shaping DAC

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2007, Pages 69-72

  Chen, Jianzhong ^a   Xu, Yong Ping ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS; DELTA SIGMA MODULATION; ERROR ANALYSIS; MICROPROCESSOR CHIPS; SIGNAL TO NOISE RATIO;

NOISE SHAPING DYNAMIC ELEMENT MATCHING (NSDEM);

MODULATORS;

EID: 39549115655     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2007.4405683     Document Type: Conference Paper

References (7)

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5. A. Bosi et al., "An 80-MHz 4x Oversampled Cascaded AZ-pipelined ADC with 75dB DR and 87dB SFDR", ISSCC Dig. Tech. Papers, pp. 174-176, Feb. 2005.
6. K. Vleugels, S. Rabii, and B. A. Wooley, "A 2.5-V sigma-delta modulator for broadband communication applications," IEEE J. Solid-State Circuits, vol. 36, pp. 1887-1899, Dec. 2001.
7. Ruoxin Jiang and Terri S. Fiez, "A 14-bit ΔΣ ADC With 8x OSR and 4-MHz Conversion Bandwidth in a 0.18-nm CMOS Process", J. SolidState Circuits, Vol. 39, No, 1, pp. 63-74, Jan. 2004.