A functional 41-stage ring oscillator using scaled FinFET devices with 25-nm gate lengths and 10-nm fin widths applicable for the 45-nm CMOS node

IEEE Electron Device Letters

Volumn 25, Issue 8, 2004, Pages 568-570

  Collaert, N ^a   Dixit, A ^a,b   Goodwin, M ^c   Anil, K G ^a   Rooyackers, R ^a   Degroote, B ^a   Leunissen, L H A ^a   Veloso, A ^a   Jonckheere, R ^a   De Meyer, K ^a,b   Jurczak, M ^a   Biesemans, S ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON MOBILITY; GATES (TRANSISTOR); LEAKAGE CURRENTS; OSCILLATORS (ELECTRONIC); SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DEVICE MANUFACTURE; THRESHOLD VOLTAGE;

DRAIN INDUCED BARRIER LEAKAGE CHARACTERISTICS; EQUIVALENT OXIDE THICKNESS; FINFET DEVICES; RING OSCILLATOR;

MOSFET DEVICES;

EID: 3943110263     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.831585     Document Type: Article

References (10)

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