메뉴 건너뛰기




Volumn 85, Issue 3, 2008, Pages 599-602

Single mask dual damascene processes

Author keywords

Copper interconnect; Dual damascene; Mask; Misalignment; Phase shift mask; Single mask dual damascene process

Indexed keywords

DIELECTRIC MATERIALS; IMAGE ANALYSIS; IMAGE RECONSTRUCTION; PATTERN RECOGNITION; PHOTORESISTS;

EID: 39149145548     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2007.11.003     Document Type: Article
Times cited : (1)

References (13)
  • 4
    • 39149141185 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors, Lithography 5 Update, 2006.
    • International Technology Roadmap for Semiconductors, Lithography 5 Update, 2006.
  • 7
    • 39149106597 scopus 로고    scopus 로고
    • S. Wolf, Silicon Processing for the VLSI Era, vol. 4, Lattice Press, 2004, p. 674.
    • S. Wolf, Silicon Processing for the VLSI Era, vol. 4, Lattice Press, 2004, p. 674.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.