Reversible synthesis with minimum logic function

2006 International Conference on Computational Intelligence and Security, ICCIAS 2006

Volumn 2, Issue , 2006, Pages 968-971

  Guan, Zhijin ^a,b   Qin, Xiao Lin ^a   Ge, Ziming ^c   Zhang, Yiqing ^b  

^a NANJING UNIVERSITY OF AERONAUTICS AND ASTRONAUTICS   (China)

^b NANTONG UNIVERSITY   (China)

^c EAST CHINA UNIVERSITY OF SCIENCE AND TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FUNCTIONS; LOGIC GATES; OPTIMIZATION;

LOGIC FUNCTION; REVERSIBLE SYNTHESIS; TOFFOLI GATES;

FORMAL LOGIC;

EID: 38949120920     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCIAS.2006.295405     Document Type: Conference Paper

References (11)

1. M. Nielsen and I. Chuang, Quantum Computation and Quantum Information, Cambridge University Press, 2000.
2. R. C. Merkle, "Reversible electronic logic using switches", Nanotechnology, 1993, pp. 21-40.
3. P. Picton, "A universal architecture for multiple-valued reversible logic", MVL Jounal, 2000, pp. 27-37.
4. T.Toffoli, Reversible computing, Tech memo MIT/LCS/TM-151, MIT Lab for Comp. Sci,1980
5. Zhijin Guan, Xiaolin Qin, Yiqing Zhang, "A design method for logic optimization of large number of I/O Variables", Journal of Computational Information Systems 2006, pp. 254-260.
6. Tan, E.C. and Yang, H, "Fast tabular technique for kedpolarity Reed-Muller logic with inherent parallel process", Int. 1 Electron, 1998, pp. 511-520.
7. KHAN, Md.M.H.A., and ALAM, MdS, "Mapping of fixed polarity Reed-Mullercoefficients from minterms and the minimisation of fixed polarity Reed-Muller expressions", Int. 1 Electron., 1997, pp. 235-247.
8. Abhinav Agrawal and Niraj Kjha, "Synthesis of reversible logic", Proceeding of the design, Automation and test in Europe, 2004, pp. 1385-1385
9. V. V. Shende, A. K. Prasad, I. L. Markov, and J. P. Hayes, "Reversible logic circuit synthesis", in Proc. Int. Conf. Computer-Aided Design, 2002, pp. 125-132.
10. D. M. Miller, D. Maslov, and G. W. Dueck, "A transformation based algorithm for reversible logic synthesis", in Proc. Design Automation Conf., 2003, pp. 318-323.
11. A. Klilopotine, M. Perkowski, and P. Kerntopf, "Reversible logic synthesis by iterative compositions", in Proc. Int. Wkshp. Logic Synthesis, 2002, pp. 261-266.