High-Q on-chip inductors using extremely thick silicon dioxide and copper-damascene technology

Electronics Letters

Volumn 44, Issue 3, 2008, Pages 241-242

  Tang, M ^a   Li, H Y ^a   Zhang, Q X ^a   Liao, E B ^a   Yu, A B ^a   Lo, G Q ^a   Balasubramanian, N ^a   Kwong, D L ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COPPER; DEPOSITION; ENGINEERING RESEARCH;

COPPER-DAMASCENE TECHNOLOGY; QUALITY FACTORS;

SILICA;

EID: 38849188061     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20083010     Document Type: Article

References (6)

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3. Lakdawala, H., Zhu, X., Luo, H., Santhanam, S., Carley, L.R., and Fedder, G.K.: ' Micromachined high-Q inductors in a 0.18-m copper interconnect low-K dielectric CMOS process ', IEEE J. Solid-State Circuits, 2002, 37, (3), p. 394-403 10.1109/4.987092 0018-9200
4. Sagkol, H., Sinaga, S., Burghartz, J.N., Rejaei, B., and Akhnoukh, A.: ' Thermal effects in suspended RF spiral inductors ', IEEE Electron Devices Lett., 2005, 26, (8), p. 541-543
5. Jiang, H., and Tien, N.C.: ' Monolithic transformer with underlying deep silicon-oxide block ', Electron. Lett., 2002, 38, (3), p. 142-144 10.1049/el:20020085 0013-5194
6. 2 layer ', Electron. Lett., 2005, 41, (7), p. 446-447 10.1049/el:20050086 0013-5194