Micromachined high-Q inductors in a 0.18-μm copper interconnect low-K dielectric CMOS process

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 3, 2002, Pages 394-403

  Lakdawala, Hasnain ^b   Zhu, Xu ^b   Luo, Hao ^b   Santhanam, Suresh ^b   Richard Carley, L ^a,b   Fedder, Gary K ^b  

^a IEEE

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

CMOS micromachining; Modeling; Monolithic inductors; Quality factor; RFIC; Self resonance; Silicon integrated circuit technology; Substrate loss

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COPPER; DIELECTRIC LOSSES; MICROMACHINING; NATURAL FREQUENCIES; RESONANCE; SUBSTRATES;

COPPER INTERCONNECTS;

ELECTRIC INDUCTORS;

EID: 0036504120     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.987092     Document Type: Article

References (30)

1. RF potential of a 0.18-μm CMOS logic device technology
2. On-chip wiring design challenges for gigahertz operation
3. Si IC-compatible inductors and passive filters
4. RF circuit design aspects of spiral inductors on silicon
5. On-chip spiral inductors with patterned ground shields for Si-based RF ICs
6. High-Q inductors for wireless applications in a complementary silicon bipolar process
7. Spiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates
8. Large suspended inductors on silicon and their use in a 2-μm CMOS RF amplifier
9. A 1 GHz CMOS RF front-end IC for a direct conversion wireless receiver
10. Optimization of backside micromachined CMOS inductors for RF applications
11. Characterization of a bulk-micromachined post-process module for silicon RF technology
12. Micromachined microwave planar spiral inductors and transformer
13. Micromachined high Q inductors in 0.18-μm Cu interconnect low-K CMOS
14. Stacked inductors and transformers in CMOS technology
15. Laminated high-aspect-ratio microstructures in a conventional CMOS process
16. Copper interconnect low-k dielectric post-cmos micromachining
17. FASTHENRY: A multipole-accelerated 3-D inductance extraction program
18. Temperature dependence of Q and inductance in spiral inductors fabricated in a silicon-germanium/BiCMOS technology
19. Analysis of temperature-dependent residual stress gradients in CMOS micromachined structures
20. Physical modeling of spiral inductors on silicon
21. The modeling, characterization, and design of monolithic inductors for silicon RF ICs
22. Analysis of current crowding effects in multiturn spiral inductors
23. High speed VLSI interconnnect modeling based on S-parameter measurements
24. Electrophysics of mechanical comb actuators
25. A novel lossy and dispersive interconnnect model for integrated circuit simulation
26. Analysis, design, and optimization of spiral inductors and transformers for Si RF IC's
27. Microwave inductors and capacitors in standard multilevel interconnect silicon technology
28. CMOS RF integrated circuits at 5 GHz and beyond