-
1
-
-
0034853719
-
LOTTERYBUS: A new high-performance communication architecture for system-on-chip designs
-
Lahiri, K., Raghunathan, A., Lakshminarayana, G.: LOTTERYBUS: A new high-performance communication architecture for system-on-chip designs. In: Design Automation Conference. (2001) 15-20
-
(2001)
Design Automation Conference
, pp. 15-20
-
-
Lahiri, K.1
Raghunathan, A.2
Lakshminarayana, G.3
-
4
-
-
84893775814
-
Address bus encoding techniques for system-level power optimization
-
IEEE Computer Society
-
Benini, L., De Micheli, G., Macii, E., Sciuto, D., Silvano, C.: Address bus encoding techniques for system-level power optimization. In: Proceedings of the Conference on Design, Automation and Test in Europe, IEEE Computer Society (1998) 861-867
-
(1998)
Proceedings of the Conference on Design, Automation and Test in Europe
, pp. 861-867
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
Sciuto, D.4
Silvano, C.5
-
6
-
-
38549092339
-
-
Analog Devices Inc. Norwood, MA: Engineer-to-Engineer Note EE-229: Estimating Power for ADSP-BF533 Blackfin Processors (Rev 1.0). (2004)
-
Analog Devices Inc. Norwood, MA: Engineer-to-Engineer Note EE-229: Estimating Power for ADSP-BF533 Blackfin Processors (Rev 1.0). (2004)
-
-
-
-
7
-
-
0010834395
-
Fast cache and bus power estimation for parameterized system-on-a-chip design
-
ACM Press
-
Givargis, T.D., Vahid, F., Henkel, J.: Fast cache and bus power estimation for parameterized system-on-a-chip design. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE), ACM Press (2000) 333-339
-
(2000)
Proceedings of the Conference on Design, Automation and Test in Europe (DATE)
, pp. 333-339
-
-
Givargis, T.D.1
Vahid, F.2
Henkel, J.3
-
9
-
-
0028722375
-
Power analysis of embedded software: A first step towards software power minimization
-
Tiwari, V., Malik, S., Wolfe, A.: Power analysis of embedded software: a first step towards software power minimization. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2 (1994) 437-445
-
(1994)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, vol.2
, pp. 437-445
-
-
Tiwari, V.1
Malik, S.2
Wolfe, A.3
-
11
-
-
0142165180
-
A dictionary-based en/decoding scheme for low-power data buses
-
Lv, T., Henkel, J., Lekatsas, H., Wolf, W.: A dictionary-based en/decoding scheme for low-power data buses. IEEE Trans. Very Large Scale Integr. Syst. 11 (2003) 943-951
-
(2003)
IEEE Trans. Very Large Scale Integr. Syst
, vol.11
, pp. 943-951
-
-
Lv, T.1
Henkel, J.2
Lekatsas, H.3
Wolf, W.4
-
14
-
-
38549181378
-
-
Analog Devices Inc. Norwood, MA: ADSP-BF533 Blackfin Processor Hardware Reference (Rev 2.0). (2004)
-
Analog Devices Inc. Norwood, MA: ADSP-BF533 Blackfin Processor Hardware Reference (Rev 2.0). (2004)
-
-
-
-
15
-
-
38549170735
-
-
Texas Instruments Inc. Dallas, Texas: OMAP5912 Multimedia Processor Device Overview and Architecture Reference Guide (Rev. A). (2004)
-
Texas Instruments Inc. Dallas, Texas: OMAP5912 Multimedia Processor Device Overview and Architecture Reference Guide (Rev. A). (2004)
-
-
-
-
16
-
-
38549166043
-
-
Sigma Designs, Inc. Milpitas, CA: EM8400: MPEG-2 Decoder for Set-top, DVD and Streaming Applications (Rev 01.09.03). (2003)
-
Sigma Designs, Inc. Milpitas, CA: EM8400: MPEG-2 Decoder for Set-top, DVD and Streaming Applications (Rev 01.09.03). (2003)
-
-
-
-
17
-
-
0033691565
-
Memory access scheduling
-
New York, NY, USA, ACM Press
-
Rixner, S., Dally, W.J., Kapasi, U.J., Mattson, P., Owens, J.D.: Memory access scheduling. In: ISCA '00: Proceedings of the 27th Annual International Symposium on Computer Architecture, New York, NY, USA, ACM Press (2000) 128-138
-
(2000)
ISCA '00: Proceedings of the 27th Annual International Symposium on Computer Architecture
, pp. 128-138
-
-
Rixner, S.1
Dally, W.J.2
Kapasi, U.J.3
Mattson, P.4
Owens, J.D.5
-
18
-
-
4444379668
-
Memory access scheduling and binding considering energy minimization in multi-bank memory systems
-
New York, NY, USA, ACM Press
-
Lyuh, C.G., Kim, T.: Memory access scheduling and binding considering energy minimization in multi-bank memory systems. In: DAC '04: Proceedings of the 41st Annual Conference on Design Automation, New York, NY, USA, ACM Press (2004) 81-86
-
(2004)
DAC '04: Proceedings of the 41st Annual Conference on Design Automation
, pp. 81-86
-
-
Lyuh, C.G.1
Kim, T.2
-
19
-
-
0016116790
-
A search procedure for hamilton paths and circuits
-
Rubin, F.: A search procedure for hamilton paths and circuits. J. ACM 21 (1974) 576-580
-
(1974)
J. ACM
, vol.21
, pp. 576-580
-
-
Rubin, F.1
-
20
-
-
33646824995
-
Developing energy-aware strategies for the blackfin processor
-
MIT Lincoln Laboratory
-
VanderSanden, S., Gentile, R., Kaeli, D., Olivadoti, G.: Developing energy-aware strategies for the blackfin processor. In: Proceedings of Annual Workshop on High Performance Embedded Computing, MIT Lincoln Laboratory (2004)
-
(2004)
Proceedings of Annual Workshop on High Performance Embedded Computing
-
-
VanderSanden, S.1
Gentile, R.2
Kaeli, D.3
Olivadoti, G.4
|