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Volumn 4590 LNCS, Issue , 2007, Pages 547-560

A lazy and layered SMT(BV) solver for hard industrial verification problems

Author keywords

[No Author keywords available]

Indexed keywords

BINARY DECISION DIAGRAMS; BOOLEAN FUNCTIONS; COMPUTATIONAL METHODS; LOGIC PROGRAMMING; VERIFICATION;

EID: 38149014613     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: None     Document Type: Conference Paper
Times cited : (44)

References (19)
  • 1
    • 38149122765 scopus 로고    scopus 로고
    • http://mathsat.itc.it/cav07-bitvectors/
  • 2
    • 4444280802 scopus 로고    scopus 로고
    • Automatic abstraction and verification of verilog models
    • Proc. D.A.C, ed, ACM Press, New York
    • Andraus, Z.S., Sakallah, K.A.: Automatic abstraction and verification of verilog models. In: Proc. D.A.C. (ed.) Proc. DAC '04, ACM Press, New York (2004)
    • (2004) Proc. DAC '04
    • Andraus, Z.S.1    Sakallah, K.A.2
  • 5
    • 33750366082 scopus 로고    scopus 로고
    • Bozzano, M., Bruttomesso, R., Cimatti, A., Junttila, T., van Rossum, P., Schulz, S., Sebastiani, R.: MathSAT: A Tight Integration of SAT and Mathematical Decision Procedure. Journal of Automated Reasoning 35(1-3) (2005)
    • Bozzano, M., Bruttomesso, R., Cimatti, A., Junttila, T., van Rossum, P., Schulz, S., Sebastiani, R.: MathSAT: A Tight Integration of SAT and Mathematical Decision Procedure. Journal of Automated Reasoning 35(1-3) (2005)
  • 6
    • 84962325965 scopus 로고    scopus 로고
    • RTL-datapath verification using integer linear programming
    • IEEE Computer Society Press, Los Alamitos
    • Brinkmann, R., Drechsler, R.: RTL-datapath verification using integer linear programming. In: Proc. ASP-DAC 2002, pp. 741-746. IEEE Computer Society Press, Los Alamitos (2002)
    • (2002) Proc. ASP-DAC , pp. 741-746
    • Brinkmann, R.1    Drechsler, R.2
  • 7
    • 0022769976 scopus 로고
    • Graph-Based Algorithms for Boolean Function Manipulation
    • Bryant, R.E.: Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers C35(8), 677-691 (1986)
    • (1986) IEEE Transactions on Computers , vol.C35 , Issue.8 , pp. 677-691
    • Bryant, R.E.1
  • 8
    • 0026126376 scopus 로고
    • Locating Minimal Infeasible Constraint Sets in Linear Programs
    • Chinneck, J.W., Dravnieks, E.W.: Locating Minimal Infeasible Constraint Sets in Linear Programs. ORSA Journal on Computing 3(2), 157-168 (1991)
    • (1991) ORSA Journal on Computing , vol.3 , Issue.2 , pp. 157-168
    • Chinneck, J.W.1    Dravnieks, E.W.2
  • 9
    • 33748557565 scopus 로고    scopus 로고
    • Cyrluk, D., Möller, O., Rue H.,.: An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors. In: Grumberg, O. (ed.) CAV 1997. LNCS, 1254, Springer, Heidelberg (1997)
    • Cyrluk, D., Möller, O., Rue H.,.: An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors. In: Grumberg, O. (ed.) CAV 1997. LNCS, vol. 1254, Springer, Heidelberg (1997)
  • 11
    • 26944496164 scopus 로고    scopus 로고
    • A Decision Procedure for Fixed-width Bit-vectors
    • Technical report, Stanford University
    • Ganesh, V., Berezin, S., Dill, D.L.: A Decision Procedure for Fixed-width Bit-vectors. Technical report, Stanford University (2005), http://theory. stanford.edu/~vganesh/
    • (2005)
    • Ganesh, V.1    Berezin, S.2    Dill, D.L.3
  • 12
    • 38149010293 scopus 로고    scopus 로고
    • Johannsen, P., Drechsler, R.: Speeding Up Verification of RTL Designs by Computing One-to-one Abstractions with Reduced Signal Widths. In: VLSI-SOC (2001)
    • Johannsen, P., Drechsler, R.: Speeding Up Verification of RTL Designs by Computing One-to-one Abstractions with Reduced Signal Widths. In: VLSI-SOC (2001)
  • 13
    • 38149073045 scopus 로고    scopus 로고
    • Automatic Memory Reductions for RTL-Level Verification
    • ACM Press, New York
    • Manolios, P., Srinivasan, S.K., Vroon, D.: Automatic Memory Reductions for RTL-Level Verification. In: Proc. ICCAD 2006, ACM Press, New York (2006)
    • (2006) Proc. ICCAD
    • Manolios, P.1    Srinivasan, S.K.2    Vroon, D.3
  • 14
    • 84948954122 scopus 로고    scopus 로고
    • Solving bit-vector equations
    • Gopalakrishnan, G.C, Windley, P, eds, FMCAD 1998, Springer, Heidelberg
    • Möller, M.O., Ruess, H.: Solving bit-vector equations. In: Gopalakrishnan, G.C., Windley, P. (eds.) FMCAD 1998. LNCS, vol. 1522, Springer, Heidelberg (1998)
    • (1998) LNCS , vol.1522
    • Möller, M.O.1    Ruess, H.2
  • 16
    • 9444245078 scopus 로고    scopus 로고
    • Nieuwenhuis, R., Oliveras, A.: Congruence closure with integer offsets. In: Vardi, M.Y., Voronkov, A. (eds.) LPAR 2003. LNCS, 2850, Springer, Heidelberg (2003)
    • Nieuwenhuis, R., Oliveras, A.: Congruence closure with integer offsets. In: Vardi, M.Y., Voronkov, A. (eds.) LPAR 2003. LNCS, vol. 2850, Springer, Heidelberg (2003)
  • 17
    • 0042134797 scopus 로고    scopus 로고
    • A Hybrid SAT-Based Decision Procedure for Separation Logic with Uninterpreted Functions
    • Seshia, S.A., Lahiri, S.K., Bryant, R.E.: A Hybrid SAT-Based Decision Procedure for Separation Logic with Uninterpreted Functions. In: Proc. DAC'03 (2003)
    • (2003) Proc. DAC'03
    • Seshia, S.A.1    Lahiri, S.K.2    Bryant, R.E.3
  • 18
    • 67650295445 scopus 로고    scopus 로고
    • Challenges in making decision procedures applicable to industry
    • Elsevier, Amsterdam
    • Singerman, E.: Challenges in making decision procedures applicable to industry. In: Proc. PDPAR'05. ENTCS, vol. 144 (2), Elsevier, Amsterdam (2006)
    • (2006) Proc. PDPAR'05. ENTCS , vol.144 , Issue.2
    • Singerman, E.1
  • 19
    • 84893652372 scopus 로고    scopus 로고
    • LPSAT: A unified approach to RTL satisfiability
    • IEEE Computer Society Press, Los Alamitos
    • Zeng, Z., Kalla, P., Ciesielski, M.: LPSAT: a unified approach to RTL satisfiability. In: Proc. DATE '01, IEEE Computer Society Press, Los Alamitos (2001)
    • (2001) Proc. DATE '01
    • Zeng, Z.1    Kalla, P.2    Ciesielski, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.