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Volumn 1254, Issue , 1997, Pages 60-71

An efficient decision procedure for the theory of fixed-sized bit-vectors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; DECISION THEORY;

EID: 33748557565     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63166-6_9     Document Type: Conference Paper
Times cited : (44)

References (8)
  • 1
    • 0026913667 scopus 로고
    • Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams
    • R.E. Bryant. Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams. ACM Computing Surveys, 24(3):293-318, September 1992.
    • (1992) ACM Computing Surveys , vol.24 , Issue.3 , pp. 293-318
    • Bryant, R.E.1
  • 2
    • 84957633777 scopus 로고    scopus 로고
    • Validity Checking for Combinations of Theories with Equality
    • M. Srivas, editor, Palo Alto, CA, Springer-Verlag
    • D. Dill C. Barrett and J. Levitt. Validity Checking for Combinations of Theories with Equality. In M. Srivas, editor, FMCAD’96, volume 1166 of Lecture Notes in Computer Science, pages 187-201, Palo Alto, CA, November 1996. Springer-Verlag.
    • (1996) FMCAD’96, Volume 1166 of Lecture Notes in Computer Science , pp. 187-201
    • Barrett, D.D.C.1    Levitt, J.2
  • 3
    • 84957670988 scopus 로고    scopus 로고
    • On Shostak’s Decision Procedure for Combination of Theories
    • M. A. McRobbie and J. K. Slaney, editors, New Brunswick, NJ, July/August, Springer-Verlag
    • D. Cyrluk, P. Lincoln, and N. Shankar. On Shostak’s Decision Procedure for Combination of Theories. In M. A. McRobbie and J. K. Slaney, editors, Proc. of CADE’96, volume 1104 of Lecture Notes in Artificial Intelligence, pages 463-477, New Brunswick, NJ, July/August 1996. Springer-Verlag.
    • (1996) Proc. of CADE’96, Volume 1104 of Lecture Notes in Artificial Intelligence , pp. 463-477
    • Cyrluk, D.1    Lincoln, P.2    Shankar, N.3
  • 5
    • 0029251055 scopus 로고
    • Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
    • S. Owre, J. Rushby, N. Shankar, and F. von Henke. Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS. IEEE Transactions on Software Engineering, 21(2):107-125, February 1995.
    • (1995) IEEE Transactions on Software Engineering , vol.21 , Issue.2 , pp. 107-125
    • Owre, S.1    Rushby, J.2    Shankar, N.3    Von Henke, F.4
  • 6
    • 84957706271 scopus 로고    scopus 로고
    • Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study
    • M.K. Srivas and A. Camilleri, editors, Springer-Verlag, November
    • H. Ruefi. Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study. In M.K. Srivas and A. Camilleri, editors. Formal Methods in Computer-Aided Design, volume 1166 of Lecture Notes in Computer Science. Springer-Verlag, November 1996.
    • (1996) Formal Methods in Computer-Aided Design, Volume 1166 of Lecture Notes in Computer Science
    • Ruefi, H.1
  • 7
    • 0021125949 scopus 로고
    • Deciding Combinations of Theories
    • R.E. Shostak. Deciding Combinations of Theories. Journal of the ACM, 31(1):1-12, January 1984.
    • (1984) Journal of the ACM , vol.31 , Issue.1 , pp. 1-12
    • Shostak, R.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.