Exploiting Hysteresys in MCML Circuits

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 11, 2006, Pages 1170-1174

  Alioto, Massimo ^a   Pancioni, Luca ^a   Rocchi, S ^a   Vignoli, V ^a  

^a UNIVERSITY OF SIENA   (Italy)

Author keywords

CMOS; hysteresis; modeling; MOS current mode logic (MCML); source coupled logic (SCL)

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; FEEDBACK CONTROL; FREQUENCY DIVIDING CIRCUITS; HYSTERESIS; INTEGRATED CIRCUIT MANUFACTURE; LOGIC GATES; MOS DEVICES; SEMICONDUCTOR DEVICE MODELS;

MOS CURRETN MODE LOGIC; POSITVE-FEEDBACK SOURCE-COUPLED LOGIC (PFSCL);

EMITTER COUPLED LOGIC CIRCUITS;

EID: 37849185397     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.882845     Document Type: Article

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