Measuring performance, power, and temperature from real processors

Proceedings of the 2007 Workshop on Experimental Computer Science

Volumn , Issue , 2007, Pages

  Mesa Martinez, Francisco J ^a   Brown, Michael ^a   Nayfach Battilana, Joseph ^a   Renau, Jose ^a  

^a University of California

Author keywords

Power and thermal measurements

Indexed keywords

INFRARED MEASUREMENT; THERMAL BEHAVIOR; THERMAL MEASUREMENTS; THERMAL MODELS;

COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; ELECTRIC POWER MEASUREMENT; ELECTRIC POWER UTILIZATION; LARGE SCALE SYSTEMS; THERMAL EFFECTS;

PROGRAM PROCESSORS;

EID: 37849015443     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1281700.1281716     Document Type: Article

References (13)

1. BIOS and Kernel Developer's Guide for AMD Athlon 64 and AMD Opteron Processors. Advanced Micro Devices, Inc., Apr 2004.
2. D. Brooks, V. Tiwari, and M. Martonosi. Wattch: a Framework for Architectural-Level Power Analysis and Optimizations. In International Symposium on Computer Architecture, pages 83-94, Jun 2000.
3. C. Cafforio, E. Di Sciascio, C. Guaragnella, and G. Piscitelli. A simple and effective edge detector. In ICIAP '97: Proceedings of the 9th International Conference on Image Analysis and Processing-Volume I, pages 134-141, London, UK, 1997. Springer-Verlag.
4. Y.K. Cheng, P. Raha, C.C. Teng, E. Rosenbaum, and S.M. Kang. ILLIADS-T: An Electrothermal Timing Simulator for Temperature-Sensitive Reliability Diagnosis of CMOS VLSI Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(8): 1434-1445, Aug 1998.
5. Sung Woo Chung and K. Skadron. Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 114-120. IEEE Computer Society, May 2006.
6. F. Devernay and O. Faugeras. Straight lines have to be straight: automatic calibration and removal of distortion from scenes of structured enviroments. Machine Vision and Applications, 13(1):14-24, 2001.
7. H.F. Hamann, J. Lacey, A. Weger, and J. Wakil. Spatially-resolved imaging of microprocessor power (SIMP): hotspots in microprocessors. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 121-125. IEEE Computer Society, May 2006.
8. C. Isci and M. Martonosi. Runtime power monitoring in high-end processors: Methodology and empirical data. In MICRO 36: Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, 2003.
9. F. Mesa-Martinez, J. Nayfach-Battilan, and J. Renau. Power Model Validation Through Thermal Measurements. In International Symposium on Computer Architecture, Jun 2007.
10. F. Mesa-Martinez, J. Nayfach-Battilana, and J. Renau. Power model validation through thermal measurements. In ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture, New York, NY, USA, June 2007. ACM Press.
11. K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. Temperature-Aware Microarchitecture. In Proceedings of the 30th Annual International Symposium on Computer Architecture, pages 2-13, Jun 2003.
12. S. Wilton and N. Jouppi. CACTI: An Enhanced Cache Access and Cycle Time Model. IEEE Journal on Solid-State Circuits, 31(5):677-688, May 1996.
13. Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects. Technical Report CS-2003-05, Univ. of Virginia Dept. of Computer Science, March 2003.