Power model validation through thermal measurements

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2007, Pages 302-311

  Mesa Martinez, Francisco Javier ^a   Nayfach Battilana, Joseph ^a   Renau, Jose ^a  

^a University of California Santa Cruz   (United States)

Author keywords

Power and thermal measurements

Indexed keywords

CACTI POWER MODELS; POWER AND THERMAL MEASUREMENTS; THERMAL MAPS; THERMAL PACKAGE;

COMPUTER SIMULATION; GENETIC ALGORITHMS; INFORMATION ANALYSIS; MATHEMATICAL MODELS; PROGRAM PROCESSORS;

COMPUTER SYSTEMS;

EID: 35348901933     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1250662.1250700     Document Type: Conference Paper

References (13)

1. D. Brooks, V. Tiwari, and M. Martonosi. Wattch: a Framework for Architectural-Level Power Analysis and Optimizations. In International Symposium on Computer Architecture, pages 83-94, Jun 2000.
2. Y. Cheng and C. Hu. MOSFETModeling and Bsim3 User's Guide. Kluwer Academic Publishers, Norwell, MA, USA, 1999.
3. Y.K. Cheng, P. Raha, C.C. Teng, E. Rosenbaum, and S.M. Kang. ILLIADS-T: An Electrothermal Timing Simulator for Temperature-Sensitive Reliability Diagnosis of CMOS VLSI Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(8):1434-1445, Aug 1998.
4. S.-W. Chung and K. Skadron. Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 114-120. IEEE Computer Society, May 2006.
5. D. E. Goldberg. Genetic Algorithms in Search, Optimization, and Machine Learning. Addison-Wesley Professional, January 1989.
6. H.F. Hamann, J. Lacey, A. Weger, and J. Wakil. Spatially-resolved imaging of microprocessor power (SIMP): hotspots in microprocessors. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 121-125. IEEE Computer Society, May 2006.
7. C. Isci and M. Martonosi. Runtime power monitoring in high-end processors: Methodology and empirical data. In MICRO 36: Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, 2003.
8. M. N. Ozisik. Inverse Heat Transfer. Taylor and Francis, 2000.
9. M. Raudensky, K.A. Woodbury, J. Kral, and T. Brezina. Genetic Algorithm in Solution of Inverse Heat Conduction Problems, pages 293-306, 1995.
10. K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. Temperature-Aware Microarchitecture. In Proceedings of the 30th Annual International Symposium on Computer Architecture, pages 2-13, Jun 2003.
11. S. Wilton and N. Jouppi. CACTI: An Enhanced Cache Access and Cycle Time Model. IEEE Journal on Solid-State Circuits, 31(5):677-688, May 1996.
12. W. Wu, L. Jin, J. Yang, P. Liu, and S. X.-D. Tan. A systematic method for functional unit power estimation in microprocessors. In DAC '06: Proceedings of the 43nd annual conference on Design automation, New York, NY, USA, 2006. ACM Press.
13. Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects. Technical Report CS-2003-05, Univ. of Virginia Dept. of Computer Science, March 2003.