-
1
-
-
37549046115
-
-
Freescale Semiconductor, AltiVec™ Technology Programming Environments Manual, 2006; see http://www.freescale.com/files/ 32bit/doc/ref_manual/ALTIVECPEM.pdf.
-
Freescale Semiconductor, AltiVec™ Technology Programming Environments Manual, 2006; see http://www.freescale.com/files/ 32bit/doc/ref_manual/ALTIVECPEM.pdf.
-
-
-
-
2
-
-
0032681049
-
A Low-Power, High-Speed Implementation of a PowerPC™ Microprocessor Vector Extension
-
Adelaide, Australia
-
M. S. Schmookler, M. Putrino, C. Roth, M. Sharma, A. Mather, J. Tyler, H. Van Nguyen, M. N. Pham, and J. Lent, "A Low-Power, High-Speed Implementation of a PowerPC™ Microprocessor Vector Extension," Proceedings of the 14th IEEE Symposium on Computer Arithmetic, Adelaide, Australia, 1999, pp. 14-16.
-
(1999)
Proceedings of the 14th IEEE Symposium on Computer Arithmetic
, pp. 14-16
-
-
Schmookler, M.S.1
Putrino, M.2
Roth, C.3
Sharma, M.4
Mather, A.5
Tyler, J.6
Van Nguyen, H.7
Pham, M.N.8
Lent, J.9
-
3
-
-
3042513482
-
A Unified Design Space for Regular Parallel Prefix Adders
-
Paris, France
-
M. M. Ziegler and M. R. Stan, "A Unified Design Space for Regular Parallel Prefix Adders," Proceedings of the Conference on Design, Automation and Test in Europe, Paris, France, 2004, pp. 1386-1387.
-
(2004)
Proceedings of the Conference on Design, Automation and Test in Europe
, pp. 1386-1387
-
-
Ziegler, M.M.1
Stan, M.R.2
-
4
-
-
33749187458
-
The Vector Fixed Point Unit of the Synergistic Processor Element of the Cell Architecture Processor
-
Grenoble, France
-
N. Mäding, J. Leenstra, J. Pille, R. Sautter, S. Buttner, S. Ehrenreich, and W. Haller, "The Vector Fixed Point Unit of the Synergistic Processor Element of the Cell Architecture Processor," Proceedings of the 31st European Solid-State Conference, Grenoble, France, 2005, pp. 203-206.
-
(2005)
Proceedings of the 31st European Solid-State Conference
, pp. 203-206
-
-
Mäding, N.1
Leenstra, J.2
Pille, J.3
Sautter, R.4
Buttner, S.5
Ehrenreich, S.6
Haller, W.7
-
5
-
-
37549013032
-
-
S. D. Trong, M. Schmookler, E. M. Schwarz, and M. Kroener, POWER6 Binary Floating-Point Unit, Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH18), Montpellier, France, 2007, pp. 77-86.
-
S. D. Trong, M. Schmookler, E. M. Schwarz, and M. Kroener, "POWER6 Binary Floating-Point Unit," Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH18), Montpellier, France, 2007, pp. 77-86.
-
-
-
-
6
-
-
0003589321
-
IEEE Standard for Binary Floating-Point Arithmetic
-
IEEE; see
-
ANS1/IEEE Standard 754-1985, "IEEE Standard for Binary Floating-Point Arithmetic," ©1985 IEEE; see http:// 754r.ucbtest.org/standards/754xml.html.
-
(1985)
ANS1/IEEE Standard 754-1985
-
-
-
7
-
-
0003891989
-
-
Springer-Verlag, Berlin, Germany
-
S. M. Mueller and W. J. Paul, Computer Architecture: Complexity and Correctness, Springer-Verlag, Berlin, Germany, 2000, pp. 351-436.
-
(2000)
Computer Architecture: Complexity and Correctness
, pp. 351-436
-
-
Mueller, S.M.1
Paul, W.J.2
-
8
-
-
0003518498
-
-
Addison-Wesley, Boston, MA
-
J. Gosling, B. Joy, and G. Steele, The Java™ Language Specification, Addison-Wesley, Boston, MA, 1996.
-
(1996)
The Java™ Language Specification
-
-
Gosling, J.1
Joy, B.2
Steele, G.3
-
9
-
-
36049052267
-
Binary Floating-Point Unit Design: The Fused Multiply-Add Dataflow
-
V. G. Oklobdzija and R. K. Krishnamurthy, Eds, Springer, Dordrecht, The Netherlands
-
E. M. Schwarz, "Binary Floating-Point Unit Design: The Fused Multiply-Add Dataflow," High-Performance Energy-Efficient Microprocessor Design, V. G. Oklobdzija and R. K. Krishnamurthy, Eds., Springer, Dordrecht, The Netherlands, 2006, pp. 189-208.
-
(2006)
High-Performance Energy-Efficient Microprocessor Design
, pp. 189-208
-
-
Schwarz, E.M.1
-
10
-
-
37549009215
-
A 5GHz+ 128-bit Binary Floating-Point Adder for the POWER6 Processor
-
Montreux, Switzerland
-
X. Y. Yu, Y.-H. Chan, M. Kelly, E. Schwarz, B. Curran, and B. Fleischer, "A 5GHz+ 128-bit Binary Floating-Point Adder for the POWER6 Processor," Proceedings of the European Solid-State Circuits Conference, Montreux, Switzerland, 2006, pp. 166-169.
-
(2006)
Proceedings of the European Solid-State Circuits Conference
, pp. 166-169
-
-
Yu, X.Y.1
Chan, Y.-H.2
Kelly, M.3
Schwarz, E.4
Curran, B.5
Fleischer, B.6
-
11
-
-
33645675534
-
A Fully Pipelined Single-Precision Floating-Point Unit in the Synergistic Processor Element of a Cell Processor
-
H.-J. Oh, S. M. Mueller, C. Jacobi, K. D. Tran, S. R. Cottier, B. W. Michael, H. Nishikawa, et al., "A Fully Pipelined Single-Precision Floating-Point Unit in the Synergistic Processor Element of a Cell Processor," IEEE J. Solid-State Circuits 41, No. 4, 759-771 (2006).
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.4
, pp. 759-771
-
-
Oh, H.-J.1
Mueller, S.M.2
Jacobi, C.3
Tran, K.D.4
Cottier, S.R.5
Michael, B.W.6
Nishikawa, H.7
-
12
-
-
37549018196
-
-
ANSI/IEEE, DRAFT Standard for Floating-Point Arithmetic P754, Draft 1.2.5, see Working Group Records, at http://754r.ucbtest.org/.
-
ANSI/IEEE, "DRAFT Standard for Floating-Point Arithmetic P754," Draft 1.2.5, see "Working Group Records," at http://754r.ucbtest.org/.
-
-
-
-
15
-
-
0003589325
-
IEEE Standard for Radix-Independent Floating-Point Arithmetic
-
IEEE; see
-
ANSI/IEEE Standard 854-1987, "IEEE Standard for Radix-Independent Floating-Point Arithmetic," ©1987 IEEE; see http://754r.ucbtest.org/Standards/854xml.html.
-
(1987)
ANSI/IEEE Standard 854-1987
-
-
-
16
-
-
37548999071
-
-
submitted to the 18th IEEE International Conference on Application-Specific Systems, Architectures and Processors, Montreal, Canada, July
-
E. M. Schwarz and S. Carlough, "POWER6 Decimal Divide," submitted to the 18th IEEE International Conference on Application-Specific Systems, Architectures and Processors, Montreal, Canada, July 2007.
-
(2007)
POWER6 Decimal Divide
-
-
Schwarz, E.M.1
Carlough, S.2
-
17
-
-
0037885595
-
-
D. Van Nostrand Company, Inc, New York
-
R. K. Richards, Arithmetic Operations in Digital Computers, D. Van Nostrand Company, Inc., New York, 1955, pp. 247-285.
-
(1955)
Arithmetic Operations in Digital Computers
, pp. 247-285
-
-
Richards, R.K.1
|