A time-domain layered finite element reduction recovery (LAFE-RR) method for high-frequency VLSI design

IEEE Transactions on Antennas and Propagation

Volumn 55, Issue 12, 2007, Pages 3620-3629

  Gan, Houle ^a   Jiao, Dan ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Electromagnetics; Finite element methods; High frequency; On chip circuits; Time domain analysis

Indexed keywords

COMPUTER SIMULATION; ELECTROMAGNETISM; FACTORIZATION; FINITE ELEMENT METHOD; MATRIX ALGEBRA; TIME DOMAIN ANALYSIS;

FINITE ELEMENT REDUCTION RECOVERY; LARGE-SCALE ON-CHIP CIRCUITS;

VLSI CIRCUITS;

EID: 37249036024     PISSN: 0018926X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TAP.2007.910473     Document Type: Article

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