EUV mask blank defect inspection strategies for the 32 nm half-pitch and beyond

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6607, Issue PART 2, 2007, Pages

  Wurm, Stefan ^a   Han, Hakseung ^a   Kearney, Patrick ^a   Cho, Wonil ^a   Jeon, Chan Uk ^a   Gullikson, Eric ^b  

^a SEMATECH   (United States)

^b LAWRENCE BERKELEY NATIONAL LABORATORY   (United States)

Author keywords

EUV mask inspection; Extreme ultraviolet lithography

Indexed keywords

DEFECT FREE MASKS; EUV MASK INSPECTION;

DEFECTS; ERROR CORRECTION; EXTREME ULTRAVIOLET LITHOGRAPHY; INSPECTION;

MASKS;

EID: 36249032446     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.729029     Document Type: Conference Paper

References (10)

1. International Technology Roadmap for Semiconductors, http://public. itrs.net.
2. K. Kemp and S. Wurm, C. R. Physique 7, 875 (2006).
3. Wonil Cho et al., Proc. SPIE 6517, in print.
4. E.M. Gullikson et al., J. Vac.Sci.Technol. B 20(1), 81 (2002).
5. E.M. Gullikson et al., Proc. SPIE 5374, 791 (2004).
6. E.M.Gullikson et al., Proc. SPIE 5751, 1223 (2005).
7. Y. Tezuka, M. Ito, T. Terawasa and T. Tomie, Proc. SPIE 5374, 27 (2004).
8. K.A. Goldberg et al., Proceedings of the 5th International Extreme Ultraviolet Lithography Symposium, Barcelona, Spain, 16-18 October 2006, https://www.sematech.org/7870.
9. The programmed defect mask was provided by Hoya and MIRAI.
10. K.A. Goldberg et al., J. Vac. Sci. Technol. B 24, 2824 (2006).