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Volumn 47, Issue 12, 2007, Pages 2197-2204

Board level drop test and simulation of leaded and lead-free BGA-PCB assembly

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SIMULATION; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; MATHEMATICAL MODELS; SOLDERED JOINTS;

EID: 35648968617     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2006.10.017     Document Type: Article
Times cited : (47)

References (23)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.