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Volumn 39, Issue 2, 2004, Pages 191-204

Implementation of multi-valued logic gates using full current-mode CMOS circuits

Author keywords

Current mode CMOS design; Higher radix full adder; Multi valued logic

Indexed keywords

CAPACITANCE; CHARGE COUPLED DEVICES; ELECTRIC POTENTIAL; FUNCTIONS; MATHEMATICAL MODELS; NETWORKS (CIRCUITS); POWER SUPPLY CIRCUITS; SIGNAL PROCESSING; TRANSISTORS;

EID: 3543105429     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/B:ALOG.0000024066.66847.89     Document Type: Conference Paper
Times cited : (42)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.