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Volumn , Issue , 2007, Pages 992-999
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Electrical characterization and design optimization of embedded chip in substrate cavities
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Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRONIC EQUIPMENT;
ELECTRONICS PACKAGING;
MICROPROCESSOR CHIPS;
MOBILE PHONES;
OPTIMIZATION;
PERSONAL COMPUTERS;
CHIP-LAST METHODOLOGY;
DIGITAL CONVERGENCE;
ELECTROMAGNETIC SIMULATIONS;
MINIATURIZATION TREND EFFICIENTLY;
EMBEDDED SYSTEMS;
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EID: 35348899435
PISSN: 05695503
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ECTC.2007.373918 Document Type: Conference Paper |
Times cited : (4)
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References (7)
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