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Volumn 24, Issue 5, 2007, Pages 486-493

Cell broadband engine debugging for unknown events

Author keywords

Broadband communication; Cell Broadband Engine; Computer architecture; Debugging; Engines; High speed processors; Magnetic cores; Microprocessors; Unknown events

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER DEBUGGING; LOGIC DESIGN; MAGNETIC CORES; MICROPROCESSOR CHIPS;

EID: 35348864964     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2007.157     Document Type: Conference Paper
Times cited : (12)

References (6)
  • 1
    • 39749148333 scopus 로고    scopus 로고
    • M. Riley et al., Debug of the CELL Processor: Moving the Lab into Silicon, Proc. IEEE Int'l Test Conf. (ITC 06), IEEE CS Press, 2006, art. 297671 (9 pp.).
    • M. Riley et al., "Debug of the CELL Processor: Moving the Lab into Silicon," Proc. IEEE Int'l Test Conf. (ITC 06), IEEE CS Press, 2006, art. 297671 (9 pp.).
  • 2
    • 27344435504 scopus 로고    scopus 로고
    • The Design and Implementation of a First-Generation CELL Processor
    • IEEE Press
    • D. Pham et al., "The Design and Implementation of a First-Generation CELL Processor," Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 05), IEEE Press, 2005, pp. 184-185, 592.
    • (2005) Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 05)
    • Pham, D.1
  • 4
    • 0030737063 scopus 로고    scopus 로고
    • Designing UltraSparc for Testability
    • Jan.-Mar
    • M. Levitt, "Designing UltraSparc for Testability," IEEE Design & Test, vol. 14, no. 1, Jan.-Mar. 1997, pp. 10-17.
    • (1997) IEEE Design & Test , vol.14 , Issue.1 , pp. 10-17
    • Levitt, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.