Designing UltraSparc for testability

IEEE Design and Test of Computers

Volumn 14, Issue 1, 1997, Pages 10-17

  Levitt, Marc E ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST EFFECTIVENESS; FAILURE ANALYSIS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; LEAKAGE CURRENTS; LOGIC DESIGN; LOGIC GATES; MICROCOMPUTERS; MULTIPLEXING EQUIPMENT; RANDOM ACCESS STORAGE; STANDARDS;

ADDRESS SPACE IDENTIFIERS; BOUNDARY CELL DESIGN; COST BENEFIT ANALYSIS; CPU CLOCK; DECODED MULTIPLEXER; DESIGN FOR TESTABILITY; EMBEDDED MEMORY ARRAYS; MICROPROCESSOR DESIGN; STATIC RANDOM ACCESS MEMORY; YIELD ENHANCEMENT;

MICROPROCESSOR CHIPS;

EID: 0030737063     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.573352     Document Type: Article

References (9)

1. M. Levitt et al., "Testability, Debuggability, and Manufacturability Features of the UltraSparc I," Proc. IEEEInt'l Test Conf., IEEE Computer Society Press, Los Alamitos, Calif., 1995, pp. 157-166.
2. D. Greenley et al., "UltraSPARC: The Next Generation Superscalar 64-Bit SPARC," Proc. Compcon, IEEE CS Press, 1995, pp. 442-451.
3. IEEE Std 1149.1-1990, IEEE Standard Test Access Port and Boundary-Scan Architecture, IEEE, Piscataway, N.J., 1990.
4. M. Levitt, "Formal Verification of the UltraSPARC Family of Processors via ATPG Methods," Proc. IEEE Int'l Test Conf., IEEE CS Press, 1996, pp. 849-856.
5. Reference Manual, Sunrise Test Systems Inc., Fremont, Calif., 1994.
6. L. Youngs et al., "Design of the UltraSPARC-I Microprocessor for Manufacturing Performance," Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, SPIE Proc., Vol. 2874, Oct. 1996, pp. 179-186.
7. G. Billus and L. Youngs, "Test of UltraSPARC-I Microprocessor Embedded Memories, TLBs, and Register Files," Texas Instruments Tech. J., Vol. 13, No. 3, May-June 1996, pp. 101-110.
8. K. Holdbrook et al., "microSPARC™: A Case Study of ScanBased Debug," Proc. IEEE Int'l Test Conf., IEEE CS Press, 1994, pp. 70-75.
9. J. Katz, "A Case-Study in the Use of Scan in microSPARC™ Testing and Debug," Proc. IEEE Int'l Test Conf., IEEE CS Press, 1994, pp. 456-460.