A fault-tolerant single-chip multiprocessor

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3189, Issue , 2004, Pages 137-145

  Yao, Wenbin ^a   Wang, Dongsheng ^a   Zheng, Weimin ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE SYSTEMS; FIRMWARE; MEMORY ARCHITECTURE; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NANOTECHNOLOGY; SEMICONDUCTOR DEVICE MANUFACTURE;

CATASTROPHIC FAILURES; CORRECTING SYSTEMS; HARDWARE REDUNDANCY; HIGH AVAILABILITY; INFORMATION STRATEGY; SEMICONDUCTOR MANUFACTURING; SINGLE-CHIP MULTIPROCESSORS; TRADITIONAL APPROACHES;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 35048902428     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30102-8_12     Document Type: Article

References (6)

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6. D. C. Bossen, J. M. Tendler, Kevin Reick. POWER4 System Design for High Reliability. IEEE Micro. Vol. 22, No. 2 (2002) 16-24