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Volumn , Issue , 2007, Pages 207-210
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An all-digital phase-locked loop with high-resolution for SoC applications
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Author keywords
[No Author keywords available]
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Indexed keywords
BLOCK CODES;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
CORRELATION DETECTORS;
DIGITAL CONTROL SYSTEMS;
INTELLECTUAL PROPERTY;
OPTICAL RESOLVING POWER;
ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL);
DEAD ZONES;
DIGITALLY CONTROLLED OSCILLATOR (DCO);
PHASE/FREQUENCY DETECTOR (PFD);
PHASE LOCKED LOOPS;
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EID: 34748877688
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/VDAT.2006.258161 Document Type: Conference Paper |
Times cited : (31)
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References (7)
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