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Volumn 48, Issue 4, 2001, Pages 367-375
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Design and analysis of a portable high-speed clock generator
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Author keywords
ADPLL; Clock generator; Frequency synthesizer; Full pull in range; HDL; Low jitter
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Indexed keywords
ALGORITHMS;
CMOS INTEGRATED CIRCUITS;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
COMPUTER SIMULATION;
DIGITAL SIGNAL PROCESSING;
FREQUENCY SYNTHESIZERS;
INTEGRATED CIRCUIT TESTING;
JITTER;
OSCILLATORS (ELECTRONIC);
PHASE LOCKED LOOPS;
TIMING CIRCUITS;
ALL-DIGITAL PHASE LOCKED LOOP;
PEAK-TO-PEAK JITTER;
PORTABLE CLOCK GENERATOR;
PRUNE AND SEARCH ALGORITHM;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0035300186
PISSN: 10577130
EISSN: None
Source Type: Journal
DOI: 10.1109/82.933795 Document Type: Article |
Times cited : (35)
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References (8)
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