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Volumn , Issue , 2007, Pages 361-364

Fault tolerance analysis of NoC architectures

Author keywords

[No Author keywords available]

Indexed keywords

INTERFACES (COMPUTER); NETWORK ARCHITECTURE; ROUTERS;

EID: 34548837736     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.378464     Document Type: Conference Paper
Times cited : (24)

References (12)
  • 1
    • 0141837018 scopus 로고    scopus 로고
    • Trends and challenges in VLSI circuit reliability
    • July-Aug
    • C. Constantinescu, Trends and challenges in VLSI circuit reliability. IEEE Micro, Vol. 23, Issue 4, July-Aug. 2003, pp. 14-19.
    • (2003) IEEE Micro , vol.23 , Issue.4 , pp. 14-19
    • Constantinescu, C.1
  • 4
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: On-chip interconnection networks
    • W.J. Dally and B. Towles. Route packets, not wires: on-chip interconnection networks. Proc. Design Automation Conference, 2001, pp. 684-689.
    • (2001) Proc. Design Automation Conference , pp. 684-689
    • Dally, W.J.1    Towles, B.2
  • 7
    • 34548857968 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors
    • International Technology Roadmap for Semiconductors 2005. http://public.itrs.net.
    • (2005)
  • 9
    • 84948696213 scopus 로고    scopus 로고
    • A network on chip architecture and design methodology
    • Apr
    • S. Kumar, et al., A network on chip architecture and design methodology. IEEE Computer Society Symposium on VLSI, Apr. 2002. pp. 105-112.
    • (2002) IEEE Computer Society Symposium on VLSI , pp. 105-112
    • Kumar, S.1
  • 10
    • 34547375280 scopus 로고    scopus 로고
    • An Approach for Analysing and Improving Fault Tolerance in Radio Architectures
    • May
    • T. Lehtonen. et al.An Approach for Analysing and Improving Fault Tolerance in Radio Architectures. IEEE International Symposium on Circuits and Systems ISCAS 2006, May 2006, pp. 3414-3417.
    • (2006) IEEE International Symposium on Circuits and Systems ISCAS 2006 , pp. 3414-3417
    • Lehtonen, T.1
  • 11
    • 34547305754 scopus 로고    scopus 로고
    • On Fault Tolerance Techniques towards Nanoscale Circuits and Systems
    • Technical Report 708, Turku Centre for Computer Science TUCS, Aug
    • T. Lehtonen, J. Plosila and J. Isoaho, On Fault Tolerance Techniques towards Nanoscale Circuits and Systems. Technical Report 708, Turku Centre for Computer Science (TUCS), Aug. 2005.
    • (2005)
    • Lehtonen, T.1    Plosila, J.2    Isoaho, J.3
  • 12
    • 9544258270 scopus 로고    scopus 로고
    • Self-timed communication platform for implementing high-performance systems-on-chip
    • October
    • P. Liljeberg, J. Plosila and J. Isoaho, Self-timed communication platform for implementing high-performance systems-on-chip. Integration, the VLSI Journal, Vol. 38, Issue 1, October 2004, pp. 43-67.
    • (2004) Integration, the VLSI Journal , vol.38 , Issue.1 , pp. 43-67
    • Liljeberg, P.1    Plosila, J.2    Isoaho, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.