Bias stress-induced threshold-voltage instability of SiC MOSFETs

Materials Science Forum

Volumn 527-529, Issue PART 2, 2006, Pages 1317-1320

  Lelis, A J ^a   Habersat, D ^a   Lopez, G ^a   McGarrity, J M ^b   McLean, F B ^b   Goldsman, N ^c  

^a U S ARMY RESEARCH LABORATORY   (United States)

^b Berkeley Research Associates   (United States)

^c UNIVERSITY OF MARYLAND   (United States)

Author keywords

MOSFET reliability; Oxide charge trapping; Threshold voltage instability

Indexed keywords

BIAS CURRENTS; CHARGE TRAPPING; INTERFACIAL ENERGY; STRESS ANALYSIS; THRESHOLD VOLTAGE;

MOSFET RELIABILITY; OXIDE CHARGE TRAPPING; OXIDE TRANSITION REGIONS; THRESHOLD VOLTAGE INSTABILITY;

MOSFET DEVICES;

EID: 34548790471     PISSN: 02555476     EISSN: 16629752     Source Type: Book Series    
DOI: 10.4028/0-87849-425-1.1317     Document Type: Conference Paper

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