Digital built-in self-test of CMOS analog iterative decoders

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 2204-2207

  Yiu, Mimi ^a   Gaudet, Vincent C ^a   Schlegel, Christian ^a   Winstead, Chris ^b  

^a UNIVERSITY OF ALBERTA   (Canada)

^b UTAH STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS ANALOG; DECODING RATES; DESIGN METHOD; DIGITAL DOMAIN; HARDWARE COST; ITERATIVE DECODER; MIXED SIGNAL; SUM-PRODUCT ALGORITHM;

BUILT-IN SELF TEST;

DECODING;

EID: 34547867479     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465059     Document Type: Conference Paper

References (13)

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