An evolvable hardware system in Xilinx Virtex II Pro FPGA

International Journal of Innovative Computing and Applications

Volumn 1, Issue 1, 2007, Pages 63-73

  Vašíček, Zdenĕk ^a   Sekanina, Lukáš ^a  

^a BRNO UNIVERSITY OF TECHNOLOGY   (Czech Republic)

Author keywords

EA; evolutionary algorithm; evolvable hardware; field programmable gate array; FPGA; image operator

Indexed keywords

EID: 34547519629     PISSN: 1751648X     EISSN: 17516498     Source Type: Journal    
DOI: 10.1504/IJICA.2007.013402     Document Type: Article

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