ILP and heuristic techniques for system-level design on network processor architectures

ACM Transactions on Design Automation of Electronic Systems

Volumn 12, Issue 4, 2007, Pages

  Ostler, Chris ^a,c   Chatha, Karam S ^a,c   Ramamurthi, Vijay ^a,c   Srinivasan, Krishnan ^b,d  

^a ARIZONA STATE UNIVERSITY   (United States)

^b Sonics ^*

^c Arizona State University   (United States)

^d Sonics Inc   (Canada)

Author keywords

Block multithreading; Multiprocessor

Indexed keywords

DATA MAPPING; HEURISTIC TECHNIQUES; NETWORK PROCESSOR ARCHITECTURES; PROCESS TRANSFORMATIONS;

DATA ACQUISITION; HEURISTIC METHODS; LINEAR PROGRAMMING; MULTIPROCESSING SYSTEMS; PROGRAM PROCESSORS; SYSTEMS ANALYSIS;

NETWORK ARCHITECTURE;

EID: 34547310435     PISSN: 10844309     EISSN: 15577309     Source Type: Journal    
DOI: 10.1145/1278349.1278361     Document Type: Article

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