System level methodology for programming CMP based multi-threaded network processor architectures

Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI

Volumn , Issue , 2005, Pages 110-116

  Ramamurthi, Vijaykumar ^a   McCollum, Jason ^a   Ostler, Christopher ^a   Chatha, Karam S ^a  

^a Arizona State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MULTI-PROCESSORS; NETWORK PROCESSOR; PROCESSING UNITS; SYSTEM-LEVEL;

COMPUTER ARCHITECTURE; COMPUTER NETWORKS; COMPUTER SYSTEMS PROGRAMMING; DYNAMIC RANDOM ACCESS STORAGE; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; STATIC RANDOM ACCESS STORAGE;

SYSTEMS ANALYSIS;

EID: 26844460724     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2005.71     Document Type: Conference Paper

References (8)

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8. Intel Corporation. "IXP 2400 Network Processor Datasheet ". ftp://download.intel.com/design/network/datashts/30116411.pdf.