A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 4419-4422

  Schoofs, Raf ^a   Steyaert, Michiel ^a   Sansen, Willy ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; ELECTRIC POWER UTILIZATION; OPTIMIZATION; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO; WIRELESS LOCAL AREA NETWORKS (WLAN);

CMOS TECHNOLOGY; INPUT SIGNAL BANDWIDTH; LOW POWER BUILDING BLOCKS; SIGNAL TO NOISE AND DISTORTION RATIO;

ANALOG TO DIGITAL CONVERSION;

EID: 34547296502     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. M. Engels, Wireless OFDM Systems. Norwell, MA: Kluwer, 2002.
2. R. Schoofs, J. Deveugele, and M. Steyaert, "Dedicated AD/DA Topologies for Wireless Applications," International Microwave Symposium, Fort Worth, Tx, June 2004.
3. K. Vleugels, S. Rabii, and BA. Wooley, "A 2.5-V Sigma-Delta Modulator for Broadband Communications Applications," IEEE J. Solid-State Circuits, vol. 31, no.12, pp. 1887-1899, Dec. 2001.
4. R.T. Baird and T.S. Fiez, "Linearity Enhancement of Multibit ΔΣ A/D and D/A Converters Using Data Weighted Averaging," IEEE Trans. Circuits Syst. II, vol. 42, no.12, pp. 753-762, Dec. 1995.
5. A. Marques, V. Peluso, M. Steyaert, and W. Sansen, "Optimal Parameters for ΔΣ Modulator Topologies," IEEE Trans. Circuits Syst. II, vol. 45, no. 9, pp. 1232-1241, Sept. 1998.
6. M. Ortmanns, Y. Manoli, and F. Gerfers, "A Continuous-Time Sigma-Delta Modulator with Reduced Jitter Sensitivity," Proc. ESSCirC, 2002, pp. 287-290.
7. J.A. Cherry, and W. M. Snelgrove, "Excess Loop Delay in Continuous-Time Delta-Sigma Modulators," IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 376-389, April 1999.
8. R. Schoofs, M. Steyaert, and W. Sansen, "A 1 GHz Continuous-Time Sigma-Delta A/D Converter in 90 nm standard CMOS," International Microwave Symposium, Long Beach, CA June 2005.
9. mC filter design methodology for high-speed continuous-time A/D converters in a deep sub-micron technology", VLSI Circuits and Systems II Conf., Sevilla, May 2005.
10. R. Schoofs, M. Steyaert, and W. Sansen, "Current-Steering DAC Design for High-Speed Continuous-Time Sigma-Delta A/D Converters", DCIS'05, Lisbon, Nov. 2005.