A 1 GHz continuous-time sigma-delta A/D converter in 90 nm standard CMOS

IEEE MTT-S International Microwave Symposium Digest

Volumn 2005, Issue , 2005, Pages 1287-1290

  Schoofs, Raf ^a   Steyaert, Michiel ^a   Sansen, Willy ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Analog digital conversion; Broadband; Continuous Time modulator; GmC filter; High speed sampling; Low power design; Sigma Delta conversion

Indexed keywords

BANDWIDTH; BROADBAND NETWORKS; CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; DIGITAL FILTERS; ELECTRIC POTENTIAL; NATURAL FREQUENCIES;

CONTINUOUS-TIME MODULATOR; HIGH-SPEED SAMPLING; LOW POWER DESIGN; SIGMA-DELTA CONVERSION;

ANALOG TO DIGITAL CONVERSION;

EID: 33749259627     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSYM.2005.1516914     Document Type: Conference Paper

References (5)

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2. S. Paton et al, "A 70-mW 300-MHz CMOS Continuous-Time ΣΔ ADC With 15-MHz Bandwidth and 11 Bits of Resolution,". IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1056-1063, July 2004.
3. mC and RC Filters for High-Speed Continuous-Time Sigma-Delta A/D Conversion", ISSSE 2004 Conference.
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5. J.A. Cherry, and W. M. Snelgrove, "Excess Loop Delay in Continuous-Time Delta-Sigma Modulators," IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 376-389, April 1999.